3D-IC stacking utilizing through silicon via (TSV) technology holds the key to extending Moore’s Law by enabling greater semiconductor device performance in smaller form factors without further lithographic scaling. Wafer bonding, in turn, plays a central role in enabling 3D-IC stacking. EV Group has a broad portfolio of industry-leading wafer bonding technologies, including fusion and hybrid bonding as well as temporary bonding and debonding, to enable high-volume production of 3D-ICs at the highest yields and lowest cost of ownership.