To complete EVG’s lithography and bonding portfolio, sufficient metrology is necessary to ensure process control and (in combination with feedback loops) also allow for process parameter optimization like bond alignment. Versatile measurement options are available to meet the metrology requirements for a wide variety of applications. These tools can fit in HVM and R&D environments.
Metrology is essential to control, optimize and ensure the highest yield in semiconductor manufacturing processes. Advanced packaging, MEMS and photonic applications are gaining importance, very often lacking suitable metrology solutions for essential processing steps. Furthermore, overall performance of the device is determined by packaging and back-end-of-line processes; hence, process requirements are getting tighter and need further metrology. EVG’s metrology solutions for wafer inspection and evaluation are optimized for lithography and all types of bonding applications. As one example, metrology prior to non-reworkable processes like wafer thinning after temporary bonding directly leads to increased yield and process security, where an integrated feedback loop results in a reduction of high-cost wafer scrap.
Listen to our Keynote "The role of wafer bonding in next generation interconnect scaling" held by Corporate Technology Development & IP Director Markus Wimplinger
Listen to our talks on Wednesday June 18th in Session 15:
"Investigation of influence of structure geometry on resist coverage for spray coating" held by Johanna Rimböck, Technology Development and
"Utilizing Inkjet Coating and Nanoimprinting for Complex 3D Patterns with Gradual Height Increase and Minimal Residual Layer" held by Business Development Manager Thomas Achleitner.
Visit us at our booth at the Leti Innovation Days 2025!
Contact the EVG experts