To complete EVG’s lithography and bonding portfolio, sufficient metrology is necessary to ensure process control and (in combination with feedback loops) also allow for process parameter optimization like bond alignment. Versatile measurement options are available to meet the metrology requirements for a wide variety of applications. These tools can fit in HVM and R&D environments.
Metrology is essential to control, optimize and ensure the highest yield in semiconductor manufacturing processes. Advanced packaging, MEMS and photonic applications are gaining importance, very often lacking suitable metrology solutions for essential processing steps. Furthermore, overall performance of the device is determined by packaging and back-end-of-line processes; hence, process requirements are getting tighter and need further metrology. EVG’s metrology solutions for wafer inspection and evaluation are optimized for lithography and all types of bonding applications. As one example, metrology prior to non-reworkable processes like wafer thinning after temporary bonding directly leads to increased yield and process security, where an integrated feedback loop results in a reduction of high-cost wafer scrap.
Visit our booth at the MicroNanoFabrication Annual Review Meeting 2025!
Visit our booth #L1300!
Visit our booth #330 and our PDC "Wafer-to-Wafer and Die-to-Wafer Hybrid Bonding for Advanced Interconnects" held by Dr. Viorel Dragoi on 27th of May and listen as well to our talks “Advanced FO PLP Digital Lithography Patterning Development for AI Devices” & “Wafer-to-Wafer Bonding With Saddle-Shaped Wafers” held by Dr. Ksenija Varga and Anton Alexeev on 29th of May. We are also looking forward to meet you at the poster session on 29th of May where Urban Peter will present “IR Laser Debonding for Silicon Based Temporary Carrier Systems Enabling 2.5D and 3D Chiplet Integration Processes”
Contact the EVG experts