To complete EVG’s lithography and bonding portfolio, sufficient metrology is necessary to ensure process control and (in combination with feedback loops) also allow for process parameter optimization like bond alignment. Versatile measurement options are available to meet the metrology requirements for a wide variety of applications. These tools can fit in HVM and R&D environments.
Metrology is essential to control, optimize and ensure the highest yield in semiconductor manufacturing processes. Advanced packaging, MEMS and photonic applications are gaining importance, very often lacking suitable metrology solutions for essential processing steps. Furthermore, overall performance of the device is determined by packaging and back-end-of-line processes; hence, process requirements are getting tighter and need further metrology. EVG’s metrology solutions for wafer inspection and evaluation are optimized for lithography and all types of bonding applications. As one example, metrology prior to non-reworkable processes like wafer thinning after temporary bonding directly leads to increased yield and process security, where an integrated feedback loop results in a reduction of high-cost wafer scrap.


Visit our booth #6426 and listen to our talks: "Advances in Dual-Side NIL: Alignment Accuracy and First-Side Protection for AR Applications" held by Business Development Manager Thomas Achleitner and in the Manufacturing Session from Dr. Thomas Glinsner.

Listen to our talk “Wafer-to-wafer Bonding Overlay: Co-Optimization with Lithography and Hidden Patterns” held by Business Development Manager Dr. Anton Alexeev.
Visit our booth #C740 and listen to our talks “EVG LayerRelease Technology ; Key Innovations in Carrier Systems: Addressing D2W and W2W Stacking Requirements” held by Corporate Sales & Marketing Director Dr. Thomas Uhrmann and “High Throughput Digital Lithography Development Enables AI and HPC Device Integration” by Business Development Manager Dr. Ksenija Varga.
Contact the EVG experts