To complete EVG’s lithography and bonding portfolio, sufficient metrology is necessary to ensure process control and (in combination with feedback loops) also allow for process parameter optimization like bond alignment. Versatile measurement options are available to meet the metrology requirements for a wide variety of applications. These tools can fit in HVM and R&D environments.
Metrology is essential to control, optimize and ensure the highest yield in semiconductor manufacturing processes. Advanced packaging, MEMS and photonic applications are gaining importance, very often lacking suitable metrology solutions for essential processing steps. Furthermore, overall performance of the device is determined by packaging and back-end-of-line processes; hence, process requirements are getting tighter and need further metrology. EVG’s metrology solutions for wafer inspection and evaluation are optimized for lithography and all types of bonding applications. As one example, metrology prior to non-reworkable processes like wafer thinning after temporary bonding directly leads to increased yield and process security, where an integrated feedback loop results in a reduction of high-cost wafer scrap.


Listen to our talks:
“Hybrid Bonding and Interconnect Scaling: Driving Application Performance, Power and Cost by Mixing and Matching Semiconductor Technologies” by Representative Director Hiroshi Yamamoto.
“A predictive model for bond strengthening based on ion characteristics and the interface evolution in plasma activated fusion and hybrid bonding” by Deputy Team Leader Process Technology David Doppelbauer.
“From Scaling to Stacking: How Fusion and Hybrid Bonding enable Next-Generation High Performance Chip Architectures” by Business Development Manager Thomas Pleschke.
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Listen to our talk “Enabling Scalable Photonic Packaging using Nanoimprint Lithography” held by Business Development Manager Andrea Kronawitter.
More information here.

Visit us at our booth at the CS / PIC and PE International Conference and listen to our talks:
"High performance GaN power devices enabled by wafer bonding" held by Business Development Manager Elisabeth Brandl at the CS Conference.
"Advancing Photonic Packaging and Integration Through UV Nanoimprint Lithography" held by Senior Process Technology Engineer Patrick Schuster at the PIC Conference.
Contact the EVG experts