Metrology
Process control and optimization for lithography and bonding
Introduction
To complete EVG’s lithography and bonding portfolio, sufficient metrology is necessary to ensure process control and (in combination with feedback loops) also allow for process parameter optimization like bond alignment. Versatile measurement options are available to meet the metrology requirements for a wide variety of applications. These tools can fit in HVM and R&D environments.
Metrology is essential to control, optimize and ensure the highest yield in semiconductor manufacturing processes. Advanced packaging, MEMS and photonic applications are gaining importance, very often lacking suitable metrology solutions for essential processing steps. Furthermore, overall performance of the device is determined by packaging and back-end-of-line processes; hence, process requirements are getting tighter and need further metrology. EVG’s metrology solutions for wafer inspection and evaluation are optimized for lithography and all types of bonding applications. As one example, metrology prior to non-reworkable processes like wafer thinning after temporary bonding directly leads to increased yield and process security, where an integrated feedback loop results in a reduction of high-cost wafer scrap.
Features
- Adaptiveness
- Multi-sensor measurement mount for highest metrology flexibility
- Sensor set available for multiple measurement ranges and materials
- Self-calibration of measurement units for minimum service and maintenance
- Integration in stand-alone or production tool
- Handling
- Handling and metrology of various substrates materials, shapes, stress, bow or warp
- Bridge capability for different substrate sizes and carrier mounted wafers
- Available with multiple load port options and combinations
- Control
- Feedback loop for correction of process parameters
- Customized Pass/Fail criteria for automated processing decisions
- Fully integrated SECS/GEM interface
Related products
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Events
SEMICON EUROPA 2025
Treffen Sie das EVG-Team am Stand #B1241 und besuchen Sie unsere Poster-Präsentation auf der APC:
"High Throughput Digital Lithography Development for 3D Device Integration" von Business Development Manager Dr. Ksenija Varga.
WaferBond 2025
Besuchen Sie unseren Stand auf der Internationalen Wafer Bonding Konferenz und hören Sie sich unsere Talks an:
"Impact of Surface Condition on In-Plane Distortion in Si Wafer Bonding: Correlation with Adhesion Energy and Bondwave Propagation Speed" von Technology Development Dr. Christoph Flötgen.
“Advanced IR Laser Debonding on Silicon Wafers for RDL- first FOWLP” von Supervisor Process Technology Peter Urban.
“D2W Bonding of III-V and piezo electrical materials for Heterogeneous Integration” von Team Leader Process Technology Mariana Pires.
“Comprehensive Bond strength optimization of LiTaO3 bonding using ComBond Technology” von Supervisor Process Technology Michael Dornetshumer.
“ComBond Bonding of Diamond and other Materials for Advanced Thermal Management” von Senior Process Technology Engineer Matthias Danner.
und besuchen Sie die Poster Presentation, wo wir mit folgendem Thema vertreten sind:
“Comparative Analysis of Atmospheric and ComBond-Activated TiTi thermos-compression Bonding” von Team Leader Process Technology Thomas Stöttinger.
EPTC 2025
Besuchen Sie unseren Stand #20 & hören Sie sich unsere Vorträge an:
"The Critical Role of Wafer Bonding in Next-Generation Interconnect Scaling" gehalten von Team Leader Business Development Dr. Bernd Dielacher und
“Innovation and Efficiency in 3D Packaging Enabled by Optimized Integration Processes” von Business Development Manager Dr. Ksenija Varga.
Fragen zu unseren Technologien?
Kontaktieren Sie die EVG-Experten