To complete EVG’s lithography and bonding portfolio, sufficient metrology is necessary to ensure process control and (in combination with feedback loops) also allow for process parameter optimization like bond alignment. Versatile measurement options are available to meet the metrology requirements for a wide variety of applications. These tools can fit in HVM and R&D environments.
Metrology is essential to control, optimize and ensure the highest yield in semiconductor manufacturing processes. Advanced packaging, MEMS and photonic applications are gaining importance, very often lacking suitable metrology solutions for essential processing steps. Furthermore, overall performance of the device is determined by packaging and back-end-of-line processes; hence, process requirements are getting tighter and need further metrology. EVG’s metrology solutions for wafer inspection and evaluation are optimized for lithography and all types of bonding applications. As one example, metrology prior to non-reworkable processes like wafer thinning after temporary bonding directly leads to increased yield and process security, where an integrated feedback loop results in a reduction of high-cost wafer scrap.

Hören Sie sich unseren Vortrag in Session 2, gehalten von Vineeth Reddy Bijjam, Technology Director North America, an: “The Critical role of Hybrid Bonding in driving Architectures for AI and High-performance Computing”
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Besuchen Sie unseren Stand Nr. L0310 und hören Sie sich unseren Vortrag auf dem Heterogeneous Integration Global Summit, mit dem Titel: „Enabling Scalable CPO Architectures Through Nanoimprint Lithography and Direct Bonding” gehalten von Business Development Director Dr. Bernd Dielacher, an.

Hören Sie sich unseren Vortrag von Business Development Managerin Dr. Ksenija Varga an: “Digital Multi–Die Patterning Approach for High–Density Packaging”.
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