To complete EVG’s lithography and bonding portfolio, sufficient metrology is necessary to ensure process control and (in combination with feedback loops) also allow for process parameter optimization like bond alignment. Versatile measurement options are available to meet the metrology requirements for a wide variety of applications. These tools can fit in HVM and R&D environments.
Metrology is essential to control, optimize and ensure the highest yield in semiconductor manufacturing processes. Advanced packaging, MEMS and photonic applications are gaining importance, very often lacking suitable metrology solutions for essential processing steps. Furthermore, overall performance of the device is determined by packaging and back-end-of-line processes; hence, process requirements are getting tighter and need further metrology. EVG’s metrology solutions for wafer inspection and evaluation are optimized for lithography and all types of bonding applications. As one example, metrology prior to non-reworkable processes like wafer thinning after temporary bonding directly leads to increased yield and process security, where an integrated feedback loop results in a reduction of high-cost wafer scrap.

Besuchen Sie unseren Stand #1126 und hören Sie sich unseren Vortrag “Advanced Lithography Technologies for Packaging: Enabling Next Gen Plasma Dicing Applications” auf der Techstage am 06. Mai gehalten von Deputy Process Technology Manager Europe Tobias Zenger an.

Hören Sie sich unseren Vortrag über “Xenon vs Argon Ion Activation for Room‑Temperature Wafer Bonding of Si and SiC” an, gehalten von Senior Process Technology Engineer Peter Kerepesi.
Weitere Informationen finden Sie hier.

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