To complete EVG’s lithography and bonding portfolio, sufficient metrology is necessary to ensure process control and (in combination with feedback loops) also allow for process parameter optimization like bond alignment. Versatile measurement options are available to meet the metrology requirements for a wide variety of applications. These tools can fit in HVM and R&D environments.
Metrology is essential to control, optimize and ensure the highest yield in semiconductor manufacturing processes. Advanced packaging, MEMS and photonic applications are gaining importance, very often lacking suitable metrology solutions for essential processing steps. Furthermore, overall performance of the device is determined by packaging and back-end-of-line processes; hence, process requirements are getting tighter and need further metrology. EVG’s metrology solutions for wafer inspection and evaluation are optimized for lithography and all types of bonding applications. As one example, metrology prior to non-reworkable processes like wafer thinning after temporary bonding directly leads to increased yield and process security, where an integrated feedback loop results in a reduction of high-cost wafer scrap.
Besuchen Sie unseren Stand und hören Sie sich unseren Vortrag “Combining Inkjet Printing and Nanoimprint Lithography for Nanopatterning with Uniform Residual Layer Thickness”,gehalten von Senior Process Technology Engineer Patrick Schuster, an.
Besuchen Sie unseren Stand und hören Sie sich unsere Vorträge „From Experimental to Essential: NIL’s Evolution in Industry“ von Thomas Glinsner, Corporate Technology Director, und „From Coffee Rings to Slopes: Solid Content Effects in Inkjet Coating for NIL“ von Johanna Rimböck an.
Besuchen Sie unseren Stand #55 auf der MicroTAS 2025!
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