Spin coating technology is a universal and intensively used process for applying uniform thin films when no topography on the wafer is considered.
Dosing accuracy of dispensed material and spin speed are some of the most important factors in spin coating processes. Other critical process parameters such as acceleration, precise positioning or possibility to perform a dynamic dispense rate also play a significant role in coat properties. EVG spin coaters are designed to control all of these critical parameters to ensure precise resist dispensing process control. Up to eight dispense lines without temperature control or up to four temperature-controlled dispense lines enhance process set-up supporting three different dispense modes to guarantee optimum results for an extensive range of resists with viscosities up to 52.000 cP. Static or dynamic center dispense mode is recommended for typical thin-film applications and standard viscosity. Area dispense mode optimizes uniformity and resist consumption by enabling extremely uniform thick resist layers for the use of high-viscosity resists like BCB or SU-8. Moreover, edge dispense mode is a typical application for etch protection purposes, especially for long-term etch processes. For this purpose, EVG systems are equipped with programmable swivel arms supporting various flat/notch designs. Additional functions – such as solvent-based pre-wetting, edge-bead removal and automatically solvent refillable sealed park position – support advanced process control and production requirements. The programmable suck-back function prevents surplus resist from dropping out of the nozzle tip on the wafer surface and thus secures conformal results throughout the whole wafer. Optional CoverSpin reduces the amount of resist material per wafer and avoids edge turbulence effects independent of the substrate shape. Overall, EVG’s spin coat module with a simulation-based low-turbulence design effectively supports resist-saving processes while providing high-uniformity results on planar or low-topography surfaces.

Besuchen Sie unseren Stand #C740 und hören Sie sich unseren Vortrag “EVG LayerRelease Technology ; Key Innovations in Carrier Systems: Addressing D2W and W2W Stacking Requirements” gehalten von Corporate Sales & Marketing Director Dr. Thomas Uhrmann, an sowie “High Throughput Digital Lithography Development Enables AI and HPC Device Integration” von Dr. Ksenija Varga.

Besuchen Sie unseren Stand #616 und hören Sie sich folgende Vorträge an:
am 25. Februar: “High aspect ratio copper pillar structures enabled by digital lithography patterning of thick resists for AI and HPC device packages” präsentiert von Dr. Ksenija Varga.
am 26. Februar: "Ultrasonic spray coating combined with maskless lithography for advanced wafer singulation with complex bump geometries" gehalten von Johanna Rimböck und “Lithography Digitalization in Semiconductor Technologies Through Advanced Software Development of High Throughput Maskless Exposure” präsentiert von Alois Malzer.

Besuchen Sie EVG am Stand #505
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