Hybrid bonding extends fusion bonding with embedded metal pads in the bond interface, allowing for face-to-face connection of wafers. The main application for hybrid bonding is in advanced 3D device stacking.
Fusion or direct wafer bonding enables permanent connection via dielectric layers on each wafer surface used for engineered substrate or layer transfer such as backside illuminated CMOS image sensors.
Fusion or direct wafer bonding allows dielectric layers and more precisely activated dangling of functional groups to bridge between wafers with the help of hydrogen bridge bonds. This pre-bonding step takes place at room temperature and atmospheric condition. Only during a subsequent annealing step are low-energy hydrogen bridge bonds turned into covalent bonds. Fusion bonding is traditionally applied for engineered substrates and more recently to stack wafers using full-area dielectrics. Due to pre-bonding at ambient conditions, a very high alignment of less than 100 nm allows for 3D integration scenarios using wafer-to-wafer fusion bonding. In addition, copper pads can be processed in parallel with the dielectric layer, allowing one to pre-bond the dielectric layer at ambient temperature, while electrical contacting can be achieved during annealing via metal diffusion bonding. This special case is called hybrid bonding. The main applications for hybrid bonding include CMOS image sensors, memory as well as 3D system-on-chip (SoC).
Besuchen Sie unseren Stand auf dem MicroNanoFabrication Annual Review Meeting 2025!
Besuchen Sie unseren Stand #L1300!
Besuchen Sie unseren Stand #330 und unser PDC „Wafer-to-Wafer and Die-to-Wafer Hybrid Bonding for Advanced Interconnects“ von Dr. Viorel Dragoi am 27. Mai und hören Sie sich auch unsere Vorträge „Advanced FO PLP Digital Lithography Patterning Development for AI Devices“ & „Wafer-to-Wafer Bonding With Saddle-Shaped Wafers“ von Dr. Ksenija Varga und Anton Alexeev am 29. Mai an. Wir freuen uns auch darauf, Sie bei der Poster Session am 29. Mai zu treffen, wo Urban Peter „IR Laser Debonding for Silicon Based Temporary Carrier Systems Enabling 2.5D and 3D Chiplet Integration Processes“ präsentieren wird.
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