融熔和混合键合

Hybrid and Fusion Bonding for Engineered Substrates and 3D Device Integration

Introduction

Hybrid bonding extends fusion bonding with embedded metal pads in the bond interface, allowing for face-to-face connection of wafers. The main application for hybrid bonding is in advanced 3D device stacking.

Fusion or direct wafer bonding enables permanent connection via dielectric layers on each wafer surface used for engineered substrate or layer transfer such as backside illuminated CMOS image sensors.

Fusion or direct wafer bonding allows dielectric layers and more precisely activated dangling of functional groups to bridge between wafers with the help of hydrogen bridge bonds. This pre-bonding step takes place at room temperature and atmospheric condition. Only during a subsequent annealing step are low-energy hydrogen bridge bonds turned into covalent bonds. Fusion bonding is traditionally applied for engineered substrates and more recently to stack wafers using full-area dielectrics. Due to pre-bonding at ambient conditions, a very high alignment of less than 100 nm allows for 3D integration scenarios using wafer-to-wafer fusion bonding. In addition, copper pads can be processed in parallel with the dielectric layer, allowing one to pre-bond the dielectric layer at ambient temperature, while electrical contacting can be achieved during annealing via metal diffusion bonding. This special case is called hybrid bonding. The main applications for hybrid bonding include CMOS image sensors, memory as well as 3D system-on-chip (SoC).

Features

Layer transfer for engineered substrates such as Silicon on insulator, RF compatible substrates, and backside illuminated image sensors
Wafer-to-wafer interconnection with high alignment needs down to 50 nm for 3D system-on-chip devices, chip stacking and die partitioning
Hybrid bond capability for simultaneous mechanical and electrical connection with very low connection pitch of less than 1 micron