先进封装,三维层叠互联

Wafer level packaging employs specific alignment and wafer bonding techniques as an enabling solution for stacking of wafers and three-dimensional integration of devices.


 
welcome_img_iceptICEPT 2016
August 16 - 19, 2016, Wuhan, China

Visit us at ICEPT 2016.


sctaiwan_logo_2016SEMICON Taiwan 2016
September 07 - 09, 2016, Taipei, Taiwan

Visit our booth # 606 in hall 4F and our presentations at SEMICON Taiwan 2016.


ESTC_finalESTC 2016
September 13 - 15, 2016, Grenoble, France

Visit our booth # 7 at ESTC 2016.


semiconmicro_logoSEMICON EUROPA 2016
October 25 - 27, 2016, Grenoble, France

Visit us at our booth #950 at SEMICON EUROPA 2016.