先进封装,三维层叠互联

Wafer level packaging employs specific alignment and wafer bonding techniques as an enabling solution for stacking of wafers and three-dimensional integration of devices.


 
PICPIC International 2016
March 1 - 2, 2016, Brussels, Belgium

Visit us and our presentation about "Advanced wafer bonding techniques for photonic integration" at PIC International 2016


ISSEU16SEMI ISS Europe 2016
March 06 - 08, 2016, Nice, France

Visit us at SEMI ISS Europe 2016.


semiconchinaSEMICON China 2016
March 15 - 17, 2016, Shanghai New International Expo Centre, China

Visit us at booth #3519 at SEMICON China 2016 and visit our presentation "Wafer-Level Bonding for High-Vacuum MEMS Manufacturing" CSTIC.


scsea_logo_16_v2SEMICON Southeast Asia 2016
April 26 - 28, 2016, Penang, Malaysia

estcESTC 2016
September 13 - 15, 2016, Grenoble, France

Visit our booth # 7 at ESTC 2016.