Wafer level packaging employs specific alignment and wafer bonding techniques as an enabling solution for stacking of wafers and three-dimensional integration of devices.
Visit us at our booth # 819 at SEMICON West 2013 .Moreover visit our presentation at the TechXPOT North - MEMS & Sensor Packaging for the Internet of Things about "From Sensor Fusion to System Fusion" and at the SEMATECH Workshop on 3D Interconnect Metrology on July 10, 2013 in conjunction with SEMICON West.
EVG and Dynaloy Jointly Develop Single-Wafer Cleaning Solution
Fraunhofer ISE Teams up with EVG to Enable Direct Semiconductor Wafer Bonds
更多新闻 ..
Photonics Festival 2013
intersolar North America 2013
更多大事记 ..
相关的产品
CMOS影像感測器
微流体技术
邏輯處理器/記憶體
微機電元件
晶圓級光學元件
EV Group and Fraunhofer IZM-ASSID Establish JDA for High-Volume 3D Integration Applications
技术文献
Product Range
EV Group Corporate Video
3D InCites reports on EVG Headquarters expansion and technology developments