Solutions for R&D

As a technology and market leader in wafer processing solutions for semiconductor, MEMS and nanotechnology applications, EVG supports partners and customers to make their ideas a reality.

Emerging Technologies - Shaping the Future

Being the first in exploring new techniques and serving next-generation applications of micro- and nano-fabrication technologies enables our customers to successfully commercialize their new product ideas.

Nanotechnology for Various Applications

EVG process technologies like nanoimprinting, hot embossing, micro-contact printing as well as adhesive bonding enable the production of device structures with feature sizes from 100 micrometers to 10 nanometers. Application areas are bio- and medical devices, sensors, MEMS and photonic structures.

Bonding "Anything on Anything" (EVG® ComBond®)

The EVG ComBond platform combines several technology breakthroughs to enable the formation of bond interfaces between heterogeneous materials at room temperature while achieving excellent bonding strength and electrical conductivity. The novel oxide-free bonding technique is particularly beneficial for silicon photonics, high-vacuum MEMS packaging and compound semiconductor and other advanced engineered substrates for “beyond CMOS” applications such as high-mobility transistors, high-performance/low-power logic and radio frequency (RF) devices. The EVG580 ComBond masters the crucial surface preparation steps that are needed to ensure contamination- and oxide-free bonds at room temperature.

Topography Coating

EVG has developed spray-coating technologies and equipment for topography coating, which is an essential process in 3D integration and wafer-level packaging applications. Examples are conformal coating of high aspect ratio structures like TSVs, conformal via lining for dicing streets and MEMS-cavity coatings.

Honeycomb texturing for Photovoltaics
(Courtesy of Fraunhofer ISE)

Wafer-bonded III-V / Si multi-junction solar cell with 30.2 percent efficiency
(Courtesy of Fraunhofer ISE/A. Wekkeli)

Sidewall Line/Space patterns