SOI & Engineered Substrates

SOI (Silicon-on-Insulator) is a semiconductor technology, which enables a full isolation of each electronic component on an integrated circuit by using a buried oxide layer.

Engineered substrates are and in particular silicon-on-insulator (SOI) substrates are essential for today's semiconductor industry. For instance, integrated circuits (IC) based on SOI provide advantages in speed or power consumption due to reduced leakage and parasitic effects. This is a result of a full isolation of each electronic component by implementing a buried oxide layer. Comparable benefits have been shown for other engineered substrates based on compound semiconductor materials and thus are considered to play an important role for several More than Moore applications.


SOI wafers consist of an ultra-thin, monocrystalline layer of silicon, which is separated from a standard Si substrate  by an insulating silicon oxide layer. Since their first implementation in the early 1990s, SOI substrates have been adopted by a diverse range of semiconductor applications due to their advantages of higher switching frequencies and lower power consumption. Due to these improved properties, SOI has evolved as a mainstream technology in areas such as radio frequency (RF) and power devices. New SOI technology developments, such as fully depleted SOI (FD-SOI), also provide a viable, cost-effective solution for devices and applications that have stringent power requirements, such as wearables and the Internet of Things (IoT), but do not require the most leading-edge lithography processes and transistor architectures such as FinFETs.


Wafer bonding is a core process step for manufacturing SOI and other engineered substrates. Today, direct wafer bonding is the industrial standard method for mass production of engineered substrates, as it is a cost-efficient and production-proven technology.

Since the installation of the first silicon-on-insulator (SOI) production wafer bonder in 1994, EV Group's developments have contributed significantly to this market. Further milestones were the implementation of EVG's proprietary LowTemp™ plasma activation technology to enable more efficient production at significantly reduced temperatures, as well as the scaling of SOI wafer bonding up to a 450mm platform for advanced semiconductor manufacturing research. EVG's process know-how and dedicated equipment portfolio clearly state the leading position in the field of SOI wafer bonding.

From standalone tools such as the EVG810 LowTemp™ plasma activation system and EVG301 Semi-automated Single Wafer Cleaning System with optional pre-bonding station, to fully automated and integrated systems such as the EVG850SOI and EVG850LT, EVG offers solutions that fulfill requirements all the way from R&D through high-volume manufacturing.

Engineered Substrates

Today's plasma activated direct bonding processes give additional degrees of freedom for implementing this technology. It has been proven for several years that most compound semiconductors can be directly bonded on different substrates. Hence, heterogeneous material integration allows one to combine the benefits of mature Si technology and the superior properties of compound semiconductor materials. This leads to significant performance increases or novel capabilities at comparatively low costs. This demand for integration is not limited to CMOS wafers and is extended to economical substrates in general.


EVG's recent developments in direct wafer bonding even enable new types of engineered substrates which have oxide-free and electrically conductive interfaces, in contrast to SOI or other conventional engineered substrates. Hence, the EVG ComBond vacuum cluster system establishes a new standard in direct covalent bonding.