Advanced Packaging, 3D Interconnect

Wafer level packaging employs specific alignment and wafer bonding techniques as an enabling solution for stacking of wafers and three-dimensional integration of devices.


 
IWLPC-2017-LogoIWLPC 2017
October 24 - 26, 2017, DoubleTree by Hilton San Jose, San Jose, California, USA
Visit us at booth # 36 at IWLPC 2017.

semiconeuropa_logoSEMICON Europa 2017
November 14 - 17, 2017, Messe München, Munich, Germany
Visit us at our booth #B1-1424 at SEMICON Europa 2017.

EPTC2017EPTC 2017
December 06 - 09, 2017, Grand Copthorne Waterfront Hotel, Singapore
Visit our booth and our presentation at EPTC 2017.

3D_Header_Website_1920x300_170713SEMI European 3D Summit 2018
January 22 - 24, 2017, Dresden, Germany