Advanced Packaging, 3D Interconnect

Wafer level packaging employs specific alignment and wafer bonding techniques as an enabling solution for stacking of wafers and three-dimensional integration of devices.


 

3DIC 2014
IEEE 3DIC 2014
Dec 01 - 03, 2014, Kinsale, Cork, Ireland
Visit our booth at 3DIC 2014.


semiconjapan
SEMICON Japan 2014
Dec 03 - 05, 2014, Tokyo Big Sight, Japan
Visit us at our booth # 5420 at SEMICON Japan 2014.

3dasip3D Architectures for Semiconductor Integration and Packaging 2014
Dec 10 - 12, 2014, Burlingame, California


SEMI3DTSVSummit15

SEMI European 3D TSV Summit 2015
January 19 - 21, 2015, Grenoble, France
Visit us at booth # 15 at the SEMI European 3D TSV Summit 2015.