SOI & Engineered Substrates

SOI ist eine Halbleiter-Technologie bei der Wafer mit einer ultradünnen „isolierten“ Halbleiterschicht
hergestellt werden auf der die elektronischen Schaltvorgänge ablaufen.

Substrate engineering is considerable gaining importance in the last years. Already in the early 90's substrate engineering developed as concrete concept to extend the performance of semiconductor devices. Following this, the first silicon-on-insulator (SOI) wafers have been introduced in production couple of years later. Since then, SOI wafers have been introduced in many different silicon device architectures:
- High performance processors, e.g. in smart phones or gaming consoles
- Low power applications
- Micro Electro Mechanical Systems (MEMS)

The heart of an SOI wafer is an ultra-thin, monocrystalline, layer of silicon, separated by an insulating silicon oxide layer from a standard thickness Si handle wafer. Due to electrical isolation of the thin top silicon layer from the thick silicon bulk wafer, devices on SOI wafer can have much improved properties. These chips obtain higher switching frequencies, lower power consumption and avoid unwanted heat production. SOI chips have a 20%-30% higher performance and consume up to 1/3 less power than chips on conventional silicon.

Today, wafer bonding is the most important manufacturing methods for SOI wafers. Direct wafer bonding found its way into industrial mass production, as cost efficient and production proven technology. An essential contribution is achieved with the EVG850 production wafer bonder from EV Group. For this equipment EVG received the Austrian Innovation Award 2004 and was announced Austria's most innovative company. Since then, EVG's SOI bonding technology constantly improved, meeting most demanding SOI wafer specifications. Latest success story for EVG's SOI bonding technology has been the first tool installation for 450mm wafers. Being one of the first equipment manufacturers moving to 450mm clearly states EVG's leading position in the field of SOI wafer bonding.

Recently, direct wafer bonding for engineered substrates has been further expanded. Especially for compound semiconductors, direct wafer bonding offers an important tool to bring new semiconductors and hence novel devices on a cost-effective production platform.
These so-called engineered substrates enable new functionality by novel materials or the combination of different materials for optimized device performance.
Possible combination of engineered substrates and their application are:

  • Mobility enhancement solutions:
    • III-Vs to silicon (e.g. GaAs, GaP, InP, GaN)
    • GOI (Germanium on Insulator)
    • sSOI (strained Silicon on Insulator)
    • SOS (Silicon on Sapphire)
    • SOI (Silicon on Insulator)
    • Heterogeneous integration
    • Optical solutions on silicon / Silicon Photonics
    • MEMS on silicon
  • High brightness light emitting diodes (HB-LEDs):
    • Engineered growth substrates
    • GaN / GaP layer transfer
  • Thermal management:
    • Silicon on Silicon Carbide
    • Silicon on Diamond
  • Multi-Junction solar cells